Semiconductor device having a semiconductor-on-insulator configuration and a superlattice and associated methods

Details for Australian Patent Application No. 2007247955 (hide)

Owner MEARS Technologies, Inc.

Inventors Rao, Kalipatnam Vivek; Kreps, Scott A.

Agent Pizzeys

Pub. Number AU-A-2007247955

PCT Pub. Number WO2007/131119

Priority 11/381,850 05.05.06 US; 11/381,835 05.05.06 US

Filing date 3 May 2007

Wipo publication date 15 November 2007

International Classifications

H01L 29/15 (2006.01) Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier

H01L 21/84 (2006.01) Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

H01L 29/786 (2006.01) Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier

H01L 27/12 (2006.01) Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate - the substrate being other than a semiconductor body, e.g. an insulating body

H01L 29/10 (2006.01) Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier

Event Publications

27 November 2008 PCT application entered the National Phase

  PCT publication WO2007/131119 Priority application(s): WO2007/131119

12 May 2011 Application Lapsed, Refused Or Withdrawn, Patent Ceased or Expired

  This application lapsed under section 142(2)(a). A direction to request examination has been given for this application. Note that applications or patents shown as lapsed or ceased may be restored at a later date.

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