Method of increasing DDR memory bandwidth in DDR SDRAM modules

Details for Australian Patent Application No. 2005251173 (hide)

Owner OCZ Technology

Inventors Shuette, Franz Michael; Petersen, Ryan M.

Agent Pizzeys

Pub. Number AU-B-2005251173

PCT Pub. Number WO2005/119686

Priority 60/521,570 26.05.04 US; 11/138,768 25.05.05 US

Filing date 26 May 2005

Wipo publication date 15 December 2005

Acceptance publication date 3 September 2009

International Classifications

G06F 13/00 (2006.01) Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units

G06F 12/06 (2006.01) Accessing, addressing or allocating within memory systems or architectures - Addressing a physical block of locations, e.g. base addressing, module addressing, address space extension, memory dedication

G11C 5/00 (2006.01) Details of stores covered by group

G11C 7/22 (2006.01) Arrangements for writing information into, or reading information out from, a digital store

G11C 11/4076 (2006.01) Digital stores characterised by the use of particular electric or magnetic storage elements

G11C 7/10 (2006.01) Arrangements for writing information into, or reading information out from, a digital store - Input/output (I/O) data interface arrangements, e.g. I/O data control circuits, I/O data buffers

G11C 11/4096 (2006.01) Digital stores characterised by the use of particular electric or magnetic storage elements

Event Publications

25 January 2007 PCT application entered the National Phase

  PCT publication WO2005/119686 Priority application(s): WO2005/119686

13 August 2009 Amendment Made

  The nature of the amendment is: Add priority details 11/138,768 US 25 May 2005

3 September 2009 Application Accepted

  Published as AU-B-2005251173

7 January 2010 Standard Patent Sealed

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