Backward-compatible parallel DDR bus for use in host-daughtercard interface

Details for Australian Patent Application No. 2004306900 (hide)

Owner Cisco Technology, Inc.

Inventors Grishaw, James Everett; Henniger, Mickey Ramal

Agent Pizzeys

Pub. Number AU-B-2004306900

PCT Pub. Number WO2005/039093

Priority 10/688,446 17.10.03 US

Filing date 13 October 2004

Wipo publication date 28 April 2005

Acceptance publication date 23 July 2009

International Classifications

G06F 13/00 (2006.01) Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units

G06F 13/42 (2006.01) Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units - Bus transfer protocol, e.g. handshake

Event Publications

4 May 2006 PCT application entered the National Phase

  PCT publication WO2005/039093 Priority application(s): WO2005/039093

23 July 2009 Application Accepted

  Published as AU-B-2004306900

6 May 2010 Application Lapsed, Refused Or Withdrawn, Patent Ceased or Expired

  This application lapsed under section 142(2)(d). This application has been accepted or advertised accepted. Note that applications or patents shown as lapsed or ceased may be restored at a later date.

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