Method of reducing the variance of a signal-to-noise ratio estimate for a signal with differential phase and coherent amplitude modulation

Details for Australian Patent Application No. 2004240362 (hide)

Owner Diseno De Sistemas En Silico, S.A.

Inventors Riveiro Insua, Juan Carlos; Blasco Claret, Jorge Vicente; Badenes Corella, Agustin

Agent Griffith Hack

Pub. Number AU-A-2004240362

PCT Pub. Number WO2004/105301

Priority P 2003 01229 26.05.03 ES

Filing date 19 May 2004

Wipo publication date 2 December 2004

International Classifications

H04L 1/20 (2006.01) Arrangements for detecting or preventing errors in the information received - using signal-quality detector

G01R 29/26 (2006.01) Arrangements for measuring or indicating electric quantities not covered by groups

Event Publications

2 February 2006 PCT application entered the National Phase

  PCT publication WO2004/105301 Priority application(s): WO2004/105301

17 December 2009 Application Lapsed, Refused Or Withdrawn, Patent Ceased or Expired

  This application lapsed under section 142(2)(d). Examination has been requested or an examination report has issued for this application. Note that applications or patents shown as lapsed or ceased may be restored at a later date.

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