METHODS OF FORMING SEMICONDUCTOR MESA STRUCTURES INCLUDING SELF-ALIGNED CONTACT LAYERS AND RELATED DEVICES

Details for Australian Patent Application No. 2003301057 (hide)

Owner CREE, INC.

Inventors SHERRICK, Sheila; SHEPPARD, Scott, T.; HABERERN, Kevin, W.

Pub. Number AU-A-2003301057

PCT Number PCT/US2003/0403

PCT Pub. Number WO2004/059751

Priority 60/435,211 20.12.02 US; 60/435,213 20.12.02 US; 60/434,914 20.12.02 US; 60/434,999 20.12.02 US

Filing date 18 December 2003

Wipo publication date 22 July 2004

International Classifications

H01L 033/00 Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission

Event Publications

27 May 2004 Complete Application Filed

  Priority application(s): 60/435,211 20.12.02 US; 60/435,213 20.12.02 US; 60/434,914 20.12.02 US; 60/434,999 20.12.02 US

26 August 2004 Application Open to Public Inspection

  Published as AU-A-2003301057

22 September 2005 Application Lapsed, Refused Or Withdrawn, Patent Ceased or Expired

  This application lapsed under section 142(2)(f)/See Reg. 8.3(3). Examination has not yet been requested or directed for this application. Note that applications or patents shown as lapsed or ceased may be restored at a later date.

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