METHOD OF FABRICATING AN INTEGRATED CIRCUIT HAVING REDUCED STRESS AND SEMICONDUCTOR CHIP

Details for Australian Patent Application No. 2003298198 (hide)

Owner INFINEON TECHNOLOGIES AG

Inventors BRUCHHAUS, Rainer; GERNHARDT, Stefan; HILLIGER, Andreas; LIAN, JingYu; NAGEL, Nicolas; WELLHAUSEN, Uwe

Pub. Number AU-A-2003298198

PCT Number PCT/EP2003/0144

PCT Pub. Number WO2004/059728

Priority 10/248,253 31.12.02 US

Filing date 17 December 2003

Wipo publication date 22 July 2004

International Classifications

H01L 023/00 Details of semiconductor or other solid state devices

H01L 021/02 Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof -

H01L 021/8239 Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

H01L 027/105 Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate - including field-effect components

Event Publications

6 May 2004 Complete Application Filed

  Priority application(s): 10/248,253 31.12.02 US

26 August 2004 Application Open to Public Inspection

  Published as AU-A-2003298198

15 September 2005 Application Lapsed, Refused Or Withdrawn, Patent Ceased or Expired

  This application lapsed under section 142(2)(f)/See Reg. 8.3(3). Examination has not yet been requested or directed for this application. Note that applications or patents shown as lapsed or ceased may be restored at a later date.

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