METHOD FOR SEMICONDUCTOR GATE LINE DIMENSION REDUCTION

Details for Australian Patent Application No. 2003296890 (hide)

Owner ADVANCED MICRO DEVICES, INC.

Inventors PLAT, Marina, V.; YANG, Chih, Yuh; BELL, Scott, A.; DAKSHINA-MURTHY, Srikanteswara; FISHER, Philip, A.; LYONS, Christopher, F.; BONSER, Douglas, J.

Pub. Number AU-A-2003296890

PCT Number PCT/US2003/0237

PCT Pub. Number WO2004/034442

Priority 60/400,384 31.07.02 US; 10/334,337 30.12.02 US

Filing date 29 July 2003

Wipo publication date 4 May 2004

International Classifications

H01L 021/00 Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

Event Publications

6 May 2004 Complete Application Filed

  Priority application(s): 60/400,384 31.07.02 US; 10/334,337 30.12.02 US

3 June 2004 Application Open to Public Inspection

  Published as AU-A-2003296890

21 July 2005 Application Lapsed, Refused Or Withdrawn, Patent Ceased or Expired

  This application lapsed under section 142(2)(f)/See Reg. 8.3(3). Examination has not yet been requested or directed for this application. Note that applications or patents shown as lapsed or ceased may be restored at a later date.

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