Method for serial allocation of addresses and monitoring the address allocation in a bus system

Details for Australian Patent Application No. 2003276176 (hide)

Owner Saia-Burgess Murten Ag Elmos Semiconductor Ag

Inventors Bourqui, Bernard; Steger, Roland

Pub. Number AU-A-2003276176

PCT Number PCT/EP03/11836

PCT Pub. Number WO2005/050924

Filing date 24 October 2003

Wipo publication date 8 June 2005

International Classifications

H04L 012/403 Data switching networks - with centralised control, e.g. polling

G06F 013/40 Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units - Bus structure

G06F 012/06 Accessing, addressing or allocating within memory systems or architectures - Addressing a physical block of locations, e.g. base addressing, module addressing, address space extension, memory dedication

H04L 029/12 Arrangements, apparatus, circuits or systems, not covered by a single one of groups - characterised by the data terminal

Event Publications

19 February 2004 Complete Application Filed

1 September 2005 Application Open to Public Inspection

  Published as AU-A-2003276176

13 July 2006 Application Lapsed, Refused Or Withdrawn, Patent Ceased or Expired

  This application lapsed under section 142(2)(f)/See Reg. 8.3(3). Examination has not yet been requested or directed for this application. Note that applications or patents shown as lapsed or ceased may be restored at a later date.

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