A CMOS APS WITH STACKED AVALANCHE MULTIPLICATION LAYER AND LOW VOLTAGE READOUT ELECTRONICS

Details for Australian Patent Application No. 2003272232 (hide)

International Classifications

Event Publications

22 January 2004 Complete Application Filed

Priority application(s): 10/226,190 23.08.02 US; 10/226,326 23.08.02 US

22 April 2004 Application Open to Public Inspection

Published as AU-A-2003272232

7 July 2005 Application Lapsed, Refused Or Withdrawn, Patent Ceased or Expired

This application lapsed under section 142(2)(f)/See Reg. 8.3(3). Examination has not yet been requested or directed for this application. Note that applications or patents shown as lapsed or ceased may be restored at a later date.

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