INTERCONNECTION ARCHITECTURE AND METHOD OF ASSESSING INTERCONNECTION ARCHITECTURE

Details for Australian Patent Application No. 2003270578 (hide)

Owner THE REGENTS OF THE UNIVERSITY OF CALIFORNIA

Inventors CHENG, Chung-Kuan; CHEN, Hongyu; YAO, Bo; GRAHAM, Ronald; CHENG, Esther, Y.

Pub. Number AU-A-2003270578

PCT Number PCT/US03/28620

PCT Pub. Number WO2004/025734

Priority 60/410,011 10.09.02 US; 60/410,396 11.09.02 US

Filing date 9 September 2003

Wipo publication date 30 April 2004

International Classifications

H01L 029/76 Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier

H01L 021/44 Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

Event Publications

15 January 2004 Complete Application Filed

  Priority application(s): 60/410,011 10.09.02 US; 60/410,396 11.09.02 US

20 May 2004 Application Open to Public Inspection

  Published as AU-A-2003270578

30 June 2005 Application Lapsed, Refused Or Withdrawn, Patent Ceased or Expired

  This application lapsed under section 142(2)(f)/See Reg. 8.3(3). Examination has not yet been requested or directed for this application. Note that applications or patents shown as lapsed or ceased may be restored at a later date.

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