METHOD AND APPARATUS FOR SETTING AND COMPENSATING READ LATENCY IN A HIGH SPEED DRAM

Details for Australian Patent Application No. 2003260069 (hide)

Owner MICRON TECHNOLOGY, INC.

Inventors KEETH, Brent; JOHNSON, Brian; LIN, Feng

Pub. Number AU-A-2003260069

PCT Number PCT/US03/26641

PCT Pub. Number WO2004/021352

Priority 10/230,221 29.08.02 US

Filing date 27 August 2003

Wipo publication date 19 March 2004

International Classifications

G11C 007/10 Arrangements for writing information into, or reading information out from, a digital store - Input/output (I/O) data interface arrangements, e.g. I/O data control circuits, I/O data buffers

Event Publications

20 November 2003 Complete Application Filed

  Priority application(s): 10/230,221 29.08.02 US

6 May 2004 Application Open to Public Inspection

  Published as AU-A-2003260069

26 May 2005 Application Lapsed, Refused Or Withdrawn, Patent Ceased or Expired

  This application lapsed under section 142(2)(f)/See Reg. 8.3(3). Examination has not yet been requested or directed for this application. Note that applications or patents shown as lapsed or ceased may be restored at a later date.

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