METHOD AND CIRCUIT ARRANGEMENT FOR SYNCHRONIZATION OF SYNCHRONOUSLY OR ASYNCHRONOUSLY CLOCKED PROCESSING UNITS

Details for Australian Patent Application No. 2003255351 (hide)

Owner SIEMENS AKTIENGESELLSCHAFT

Inventors PELESKA, Pavel; SCHNABEL, Dirk; WEBER, Anton

Pub. Number AU-A-2003255351

PCT Number PCT/EP03/08559

PCT Pub. Number WO2004/034260

Priority 02020602.5 12.09.02 EP; 02027847.9 12.12.02 EP

Filing date 1 August 2003

Wipo publication date 4 May 2004

International Classifications

G06F 011/16 Error detection - Error detection or correction of the data by redundancy in hardware

Event Publications

6 November 2003 Complete Application Filed

  Priority application(s): 02020602.5 12.09.02 EP; 02027847.9 12.12.02 EP

3 June 2004 Application Open to Public Inspection

  Published as AU-A-2003255351

26 May 2005 Application Lapsed, Refused Or Withdrawn, Patent Ceased or Expired

  This application lapsed under section 142(2)(f)/See Reg. 8.3(3). Examination has not yet been requested or directed for this application. Note that applications or patents shown as lapsed or ceased may be restored at a later date.

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