DIGITAL CIRCUIT HAVING A DELAY CIRCUIT FOR CLOCK SIGNAL TIMING ADJUSTMENT

Details for Australian Patent Application No. 2003246277 (hide)

Owner NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY

Inventors TAKAHASHI, Eiichi; KASAI, Yuji; HIGUCHI, Tetsuya

Pub. Number AU-A-2003246277

PCT Number PCT/JP03/08648

PCT Pub. Number WO2004/017520

Priority 2002-200467 09.07.02 JP

Filing date 8 July 2003

Wipo publication date 3 March 2004

International Classifications

H03K 005/13 Manipulating pulses not covered by one of the other main groups in this subclass - Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals

G06F 001/04 Details not covered by groups and - Generating or distributing clock signals or signals derived directly therefrom

Event Publications

25 September 2003 Complete Application Filed

  Priority application(s): 2002-200467 09.07.02 JP

22 April 2004 Application Open to Public Inspection

  Published as AU-A-2003246277

7 April 2005 Application Lapsed, Refused Or Withdrawn, Patent Ceased or Expired

  This application lapsed under section 142(2)(f)/See Reg. 8.3(3). Examination has not yet been requested or directed for this application. Note that applications or patents shown as lapsed or ceased may be restored at a later date.

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