A METHOD AND SYSTEM OF BIASING A TIMING PHASE ESTIMATE OF DATA SEGMENTS OF A RECEIVED SIGNAL

Details for Australian Patent Application No. 2003245557 (hide)

Owner INTEL CORPORATION

Inventors TELLADO, Jose; DRING, John

Pub. Number AU-A-2003245557

PCT Number PCT/US03/19168

PCT Pub. Number WO2004/002053

Priority 10/176,300 19.06.02 US

Filing date 17 June 2003

Wipo publication date 6 January 2004

International Classifications

H04L 007/10 Arrangements for synchronising receiver with transmitter - Arrangements for initial synchronisation

Event Publications

25 September 2003 Complete Application Filed

  Priority application(s): 10/176,300 19.06.02 US

4 March 2004 Application Open to Public Inspection

  Published as AU-A-2003245557

17 March 2005 Application Lapsed, Refused Or Withdrawn, Patent Ceased or Expired

  This application lapsed under section 142(2)(f)/See Reg. 8.3(3). Examination has not yet been requested or directed for this application. Note that applications or patents shown as lapsed or ceased may be restored at a later date.

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