SHIELDING WIRE IN MULTILAYER BOARD, SEMICONDUCTOR CHIP, ELECTRONIC CIRCUIT ELEMENT, AND METHOD FOR PRODUCING THE SAME

Details for Australian Patent Application No. 2003241819 (hide)

Owner AJINOMOTO CO.,INC.

Inventors OSHIMURA, Masahiko; SAGAWA, Kouichirou

Pub. Number AU-A-2003241819

PCT Number PCT/JP03/06647

PCT Pub. Number WO2003/100852

Priority 2002-156262 29.05.02 JP

Filing date 28 May 2003

Wipo publication date 12 December 2003

International Classifications

H01L 023/12 Details of semiconductor or other solid state devices - Mountings, e.g. non-detachable insulating substrates

H01L 021/3205 Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

H01F 017/00

H05K 003/46 Apparatus or processes for manufacturing printed circuits - Manufacturing multi-layer circuits

Event Publications

11 September 2003 Complete Application Filed

  Priority application(s): 2002-156262 29.05.02 JP

5 February 2004 Application Open to Public Inspection

  Published as AU-A-2003241819

3 March 2005 Application Lapsed, Refused Or Withdrawn, Patent Ceased or Expired

  This application lapsed under section 142(2)(f)/See Reg. 8.3(3). Examination has not yet been requested or directed for this application. Note that applications or patents shown as lapsed or ceased may be restored at a later date.

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