MEMORY CONTROLLER WITH AC POWER REDUCTION THROUGH NON-RETURN-TO-IDLE OF ADDRESS AND CONTROL SIGNALS

Details for Australian Patent Application No. 2003202883 (hide)

Owner INTEL CORPORATION

Inventors WILCOX, Jeffrey

Pub. Number AU-A-2003202883

PCT Number PCT/US03/00164

PCT Pub. Number WO2003/058629

Priority 10/042,862 08.01.02 US

Filing date 3 January 2003

Wipo publication date 24 July 2003

International Classifications

G11C 007/10 Arrangements for writing information into, or reading information out from, a digital store - Input/output (I/O) data interface arrangements, e.g. I/O data control circuits, I/O data buffers

G11C 007/22 Arrangements for writing information into, or reading information out from, a digital store

G11C 008/18 Arrangements for selecting an address in a digital store

Event Publications

10 April 2003 Complete Application Filed

  Priority application(s): 10/042,862 08.01.02 US

4 September 2003 Application Open to Public Inspection

  Published as AU-A-2003202883

23 September 2004 Application Lapsed, Refused Or Withdrawn, Patent Ceased or Expired

  This application lapsed under section 142(2)(f)/See Reg. 8.3(3). Examination has not yet been requested or directed for this application. Note that applications or patents shown as lapsed or ceased may be restored at a later date.

Legal

The information provided by the Site not in the nature of legal or other professional advice. The information provided by the Site is derived from third parties and may contain errors. You must make your own enquiries and seek independent advice from the relevant industry professionals before acting or relying on any information contained herein. Check the above data against the Australian Patent Office AUSPAT database.

Next and Previous Patents/Applications

2003202884-SYSTEM AND METHOD FOR CONTROLLING A LIGTH SOURCE FOR CAVITY RING-DOWN SPECTROSCOPY

2003202882-DYNAMIC ROUTE SELECTION FOR LABEL SWITCHED PATHS IN COMMUNICATION NETWORKS