PROCESS FOR PREPARATION OF SEPARABLE SEMICONDUCTOR ASSEMBLIES, PARTICULARLY TO FORM SUBSTRATES FOR ELECTRONICS, OPTOELECTRONICS AND OPTICS

Details for Australian Patent Application No. 2003201755 (hide)

Owner S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES

Inventors LETERTRE, Fabrice; GHYSELEN, Bruno; RAYSSAC, Olivier

Pub. Number AU-A-2003201755

PCT Number PCT/IB03/00424

PCT Pub. Number WO2003/063214

Priority 0200748 22.01.02 FR

Filing date 21 January 2003

Wipo publication date 2 September 2003

International Classifications

H01L 021/20 Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

H01L 021/762 Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

H01L 033/00 Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission

H01L 021/18 Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

Event Publications

3 April 2003 Complete Application Filed

  Priority application(s): 0200748 22.01.02 FR

18 September 2003 Application Open to Public Inspection

  Published as AU-A-2003201755

7 October 2004 Application Lapsed, Refused Or Withdrawn, Patent Ceased or Expired

  This application lapsed under section 142(2)(f)/See Reg. 8.3(3). Examination has not yet been requested or directed for this application. Note that applications or patents shown as lapsed or ceased may be restored at a later date.

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