METHOD OF LAMINATING CIRCUIT BOARD AND METHOD OF FORMING INSULATION LAYER, MULTILAYER PRINTED WIRING BOARD AND PRODUCTION METHOD THEREFOR AND ADHESION FILM FOR MULTILAYER PRINTED WIRING BOARD

Details for Australian Patent Application No. 2002355051 (hide)

Owner AJINOMOTO CO., INC.

Inventors NAKAMURA, Shigeo; YOKOTA, Tadahiko A JOINT-STOCK CORPORATION KAWASHIMA INDUSTRY see NAKAGAWA, Takeshi (21) 2002349659

Pub. Number AU-A-2002355051

PCT Number PCT/JP02/12442

PCT Pub. Number WO2003/047324

Priority 2001-367232 30.11.01 JP

Filing date 28 November 2002

Wipo publication date 10 June 2003

International Classifications

H05K 003/28 Apparatus or processes for manufacturing printed circuits - Applying non-metallic protective coatings

H05K 003/46 Apparatus or processes for manufacturing printed circuits - Manufacturing multi-layer circuits

B32B 007/10 Layered products characterised by the relation between layers, i.e. products essentially comprising layers having different physical properties or products characterised by the interconnection of layers - one or both of the layers having adhesive or inter-reactive properties

B32B 027/38 Layered products essentially comprising synthetic resin - comprising epoxy resins

C08L 063/00 Compositions of epoxy resins

Event Publications

20 March 2003 Complete Application Filed

  Priority application(s): 2001-367232 30.11.01 JP

21 August 2003 Application Open to Public Inspection

  Published as AU-A-2002355051

19 August 2004 Application Lapsed, Refused Or Withdrawn, Patent Ceased or Expired

  This application lapsed under section 142(2)(f)/See Reg. 8.3(3). Examination has not yet been requested or directed for this application. Note that applications or patents shown as lapsed or ceased may be restored at a later date.

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