PROCESS FOR OPTICALLY ERASING CHARGE BUILDUP DURING FABRICATION OF AN INTEGRATED CIRCUIT

Details for Australian Patent Application No. 2002346599 (hide)

Owner AXCELIS TECHNOLOGIES, INC.

Inventors STEWART, Kevin; JANOS, Alan; BERRY, Ivan; SINNOTT, Anthony

Pub. Number AU-A-2002346599

PCT Number PCT/US02/38310

PCT Pub. Number WO2003/049182

Priority 10/000,772 30.11.01 US

Filing date 2 December 2002

Wipo publication date 17 June 2003

International Classifications

H01L 021/8247 Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

Event Publications

13 March 2003 Complete Application Filed

  Priority application(s): 10/000,772 30.11.01 US

21 August 2003 Application Open to Public Inspection

  Published as AU-A-2002346599

19 August 2004 Application Lapsed, Refused Or Withdrawn, Patent Ceased or Expired

  This application lapsed under section 142(2)(f)/See Reg. 8.3(3). Examination has not yet been requested or directed for this application. Note that applications or patents shown as lapsed or ceased may be restored at a later date.

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