A METHOD FOR FORMING A LAYERED SEMICONDUCTOR TECHNOLOGY STRUCTURE AND CORRESPONDING LAYERED SEMICONDUCTOR TECHNOLOGY STRUCTURE

Details for Australian Patent Application No. 2002340555 (hide)

Owner UNIVERSITAT AUGSBURG

Inventors ATTENBERGER, Wilfried; LINDNER, Jorg; STRITZKER, Bernd

Pub. Number AU-A-2002340555

PCT Number PCT/EP02/11423

PCT Pub. Number WO2003/034484

Priority 60/328,759 12.10.01 US

Filing date 11 October 2002

Wipo publication date 28 April 2003

International Classifications

H01L 021/74 Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

H01L 033/00 Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission

B81C 001/00 Manufacture or treatment of devices or systems in or on a substrate

H01L 021/762 Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

H01L 021/265 Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

H01L 029/165 Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier

Event Publications

27 February 2003 Complete Application Filed

  Priority application(s): 60/328,759 12.10.01 US

3 July 2003 Application Open to Public Inspection

  Published as AU-A-2002340555

1 July 2004 Application Lapsed, Refused Or Withdrawn, Patent Ceased or Expired

  This application lapsed under section 142(2)(f)/See Reg. 8.3(3). Examination has not yet been requested or directed for this application. Note that applications or patents shown as lapsed or ceased may be restored at a later date.

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