ERROR FORWARDING IN AN ENHANCED GENERAL INPUT/OUTPUT ARCHITECTURE AND RELATED METHODS

Details for Australian Patent Application No. 2002334727 (hide)

Owner INTEL CORPORATION

Inventors HARRIMAN, David; AJANOVIC, Jasmin; GREMEL, Buck

Pub. Number AU-A-2002334727

PCT Number PCT/US02/30964

PCT Pub. Number WO2003/030436

Priority 09/968,680 30.09.01 US

Filing date 26 September 2002

Wipo publication date 14 April 2003

International Classifications

H04L 001/00 Arrangements for detecting or preventing errors in the information received

H04L 012/56 Data switching networks - Packet switching systems

Event Publications

13 February 2003 Complete Application Filed

  Priority application(s): 09/968,680 30.09.01 US

26 June 2003 Application Open to Public Inspection

  Published as AU-A-2002334727

17 June 2004 Application Lapsed, Refused Or Withdrawn, Patent Ceased or Expired

  This application lapsed under section 142(2)(f)/See Reg. 8.3(3). Examination has not yet been requested or directed for this application. Note that applications or patents shown as lapsed or ceased may be restored at a later date.

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