TRANSISTOR HAVING HIGH DIELECTRIC CONSTANT GATE INSULATING LAYER AND SOURCE AND DRAIN FORMING SCHOTTKY CONTACT WITH SUBSTRATE

Details for Australian Patent Application No. 2002331026 (hide)

Owner SPINNAKER SEMICONDUCTOR, INC.

Inventors SNYDER, John, P.; LARSON, John, M.

Pub. Number AU-A-2002331026

PCT Number PCT/US02/25289

PCT Pub. Number WO2003/015181

Priority 09/928,163 10.08.01 US; 60/381,320 16.05.02 US; 09/928,124 10.08.01 US

Filing date 9 August 2002

Wipo publication date 24 February 2003

International Classifications

H01L 029/78 Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier

H01L 021/336 Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

Event Publications

6 February 2003 Complete Application Filed

  Priority application(s): 09/928,163 10.08.01 US; 60/381,320 16.05.02 US; 09/928,124 10.08.01 US

19 June 2003 Application Open to Public Inspection

  Published as AU-A-2002331026

6 May 2004 Application Lapsed, Refused Or Withdrawn, Patent Ceased or Expired

  This application lapsed under section 142(2)(f)/See Reg. 8.3(3). Examination has not yet been requested or directed for this application. Note that applications or patents shown as lapsed or ceased may be restored at a later date.

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