DISTRIBUTED READ AND WRITE CACHING IMPLEMENTATION FOR OPTIMIZED INPUT/OUTPUT APPLICATIONS

Details for Australian Patent Application No. 2002326556 (hide)

Owner INTEL CORPORATION (a Delaware Corporation)

Inventors GEORGE, Robert; JANUARY, Duane; CRETA, Kenneth; BELL, Dennis; BLANKENSHIP, Robert; CONGDON, Bradford

Pub. Number AU-A-2002326556

PCT Number PCT/US02/25090

PCT Pub. Number WO2003/019386

Priority 09/940,835 27.08.01 US

Filing date 6 August 2002

Wipo publication date 10 March 2003

International Classifications

G06F 012/08 Accessing, addressing or allocating within memory systems or architectures - in hierarchically structured memory systems, e.g. virtual memory systems

G06F 013/40 Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units - Bus structure

Event Publications

23 January 2003 Complete Application Filed

  Priority application(s): 09/940,835 27.08.01 US

5 June 2003 Application Open to Public Inspection

  Published as AU-A-2002326556

10 June 2004 Application Lapsed, Refused Or Withdrawn, Patent Ceased or Expired

  This application lapsed under section 142(2)(f)/See Reg. 8.3(3). Examination has not yet been requested or directed for this application. Note that applications or patents shown as lapsed or ceased may be restored at a later date.

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