METHOD AND APPARATUS FOR OPTIMIZED PARALLEL TESTING AND ACCESS OF ELECTRONIC CIRCUITS

Details for Australian Patent Application No. 2002315474 (hide)

International Classifications

Event Publications

2 January 2003 Complete Application Filed

Priority application(s): 60/303,052 05.07.01 US; 10/119,060 09.04.02 US

22 May 2003 Application Open to Public Inspection

Published as AU-A-2002315474

18 March 2004 Application Lapsed, Refused Or Withdrawn, Patent Ceased or Expired

This application lapsed under section 142(2)(f)/See Reg. 8.3(3). Examination has not yet been requested or directed for this application. Note that applications or patents shown as lapsed or ceased may be restored at a later date.

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