DIRECT INNER LAYER INTERCONNECT FOR A HIGH SPEED PRINTED CIRCUIT BOARD

Details for Australian Patent Application No. 2002310503 (hide)

Owner TERADYNE, INC.

Inventors GAILUS, Mark, W.

Pub. Number AU-A-2002310503

PCT Number PCT/US02/19961

PCT Pub. Number WO2003/003799

Priority 09/892,045 26.06.01 US

Filing date 24 June 2002

Wipo publication date 3 March 2003

International Classifications

H05K 003/32 Apparatus or processes for manufacturing printed circuits - electrically connecting electric components or wires to printed circuits

H01R 012/34 Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards (PCBs), flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks

Event Publications

19 December 2002 Complete Application Filed

  Priority application(s): 09/892,045 26.06.01 US

15 May 2003 Application Open to Public Inspection

  Published as AU-A-2002310503

11 March 2004 Application Lapsed, Refused Or Withdrawn, Patent Ceased or Expired

  This application lapsed under section 142(2)(f)/See Reg. 8.3(3). Examination has not yet been requested or directed for this application. Note that applications or patents shown as lapsed or ceased may be restored at a later date.

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