HARDWARE-ASSISTED DESIGN VERIFICATION SYSTEM USING A PACKET-BASED PROTOCOL LOGIC SYNTHESIZED FOR EFFICIENT DATA LOADING AND UNLOADING

Details for Australian Patent Application No. 2002255462 (hide)

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Event Publications

13 February 2003 Application Open to Public Inspection

Published as AU-A-2002255462

29 January 2004 Application Lapsed, Refused Or Withdrawn, Patent Ceased or Expired

This application lapsed under section 142(2)(f)/See Reg. 8.3(3). Examination has not yet been requested or directed for this application. Note that applications or patents shown as lapsed or ceased may be restored at a later date.

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